2020-03163 - Post-Doctoral Research Visit F/M Run-time management of safe-critical systems on multiprocessing platforms

Renewable contract : Oui

Level of qualifications required : PhD or equivalent

Fonction : Post-Doctoral Research Visit

About the research centre or Inria department

The Inria Rennes - Bretagne Atlantique Centre is one of Inria's eight centres and has more than thirty research teams. The Inria Center is a major and recognized player in the field of digital sciences. It is at the heart of a rich R&D and innovation ecosystem: highly innovative PMEs, large industrial groups, competitiveness clusters, research and higher education players, laboratories of excellence, technological research institute, etc.

Context

Social advantages
- Subsidised catering service
- Partially-reimbursed public transport
- Social security
- Paid leave
- Flexible working hours
- Sports facilities

Salary - Duration
- 18 months contract
- Monthly net salary amounting to ~2160 euros

Assignment

Context

The  embedded  systems  from  the safety-critical domain  industries,  such  as  the  avionics,  auto-motive,  space,  healthcare  or  robotics  industries,  face  exponential  growth  in  terms  of performance requirements,  while  they  have  to  deal  with  strict hard real-time constraints.   This  constantly growing processing demand has led the processor manufacturing industry towards multi-/many-core architectures.  These architectures have multiple processor elements, called cores, providing massive computing power by concurrently executing a high volume of tasks.  While such architectures can successfully meet the demands for the majority of computing systems,  the same can not be argued for hard real-time systems [1, 2].  Hard real-time systems have to provide timing guarantees in order to be safe, i.e. guarantee that tasks are completed before their respective deadlines and/or the total execution does not exceed a given latency requirement.  Typical examples of such safety-critical systems is the Automatic Braking System (ABS) in automotive and the Fly-by-Wire control system in avionics.

In order to rigorously provide such guarantees, application deployment approaches, i.e. task map-ping/scheduling, are based on the a priori knowledge of Worst-Case Execution Time (WCET) of tasks.   There  is  a  plethora  of  research  in  WCET  estimation  for  uni-processor  systems  (see  [2]  for  a review).  However, in multi-core architectures, several arbitrated resources are shared among the cores(memories and interconnects) introducing timing delays and changing the timing behavior in a non-deterministic way.  Thus, the WCET varies according to the task deployment, as tasks interfere when simultaneously access the on-chip shared resources.  As a result, timing analysis and deployment optimisation for multicore systems becomes very challenging [3, 4, 5, 6, 7].  This effect is particularly apparent in data-parallelisable applications, due to extensive resource sharing.  We have observed that the WCET of tasks including interferences can be 750% times larger than the corresponding estimations without interferences [8] [9].  In order to extend the uni-processor deployment approaches to multi-processor architectures, the WCET of the tasks has to be over-approximated, so as to account for all possible interferences.  This over-approximation practice has lead to the “one-out-of-m processors” problem [1],where the additional processing capacity is negated by the pessimism of the WCET. As a result, the sequential execution (on a single core) potentially provides better timing guarantees than any parallel execution,  which  seriously  undermines  the  advantages  of  utilizing  multi-cores.   Nevertheless,  recent state-of-the-art research [10] has shown that context-dependent WCETs, called interference-sensitive WCET (isWCET), reduce the pessimism in WCET leading to more efficient deployments on multi-core architectures.

In this work, we explore mechanisms to provide adaptation of the execution of the safety-critical systems so as to improve the actual run-time system performance, while still meeting the real-time constraints. This performance improvement allows the systems to provide higher Quality-of-Services or execute other best-effort applications. Our approach will efficiently use the information being available during the real execution of the system in order to improve performance, energy consumption, QoS and reliability.

References

[1]  N. Kim, B. C. Ward, M. Chisholm, C.-Y. Fu, J. H. Anderson, and F. D. Smith, “Attacking the one-out-of-m multicore problem by combining hardware management with mixed-criticality provisioning,” in Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016 IEEE, pp. 1–12, IEEE, 2016.

[2]  R. Wilhelm, J. Engblom, A. Ermedahl, N. Holsti, S. Thesing, D. Whalley, G. Bernat, C. Ferdinand, R. Heck-mann, T. Mitra,et al., “The worst-case execution-time problem-overview of methods and survey of tools,”ACM Transactions on Embedded Computing Systems (TECS), vol. 7, no. 3, p. 36, 2008.

[3]  M. Bertogna,Real-time scheduling analysis for multiprocessor platforms.  PhD thesis, 2008.

[4]  S. Cotton, O. Maler, J. Legriel, and S. Saidi, “Multi-criteria optimization for mapping programs to multi-processors,” in Industrial Embedded Systems (SIES), 2011 6th IEEE International Symposium on, pp. 9–17,IEEE, 2011.

[5]  P. Tendulkar, P. Poplavko, I. Galanommatis, and O. Maler, “Many-core scheduling of data parallel applications using smt solvers,” in Digital System Design (DSD), 2014 17th Euromicro Conference on, pp. 615–622,IEEE, 2014.

[6]  J.  Legriel,  C.  Le  Guernic,  S.  Cotton,  and  O.  Maler,  “Approximating  the  pareto  front  of  multi-criteria optimization problems.,” in TACAS, Springer, 2010.

[7]  P. M. B. de Sousa, Real-Time Scheduling on Multi-core:  Theory and Practice.  PhD thesis, Universidade do Porto (Portugal), 2013.

[8]  A.  Kritikakou,  C.  Rochange,  M.  Faug`ere,  C.  Pagetti,  M.  Roy,  S.  Girbal,  and  D.  G.  P ́erez,  “Distributed run-time  WCET  controller  for  concurrent  critical  tasks  in  mixed-critical  systems,”  in Proceedings  of  the22nd International Conference on Real-Time Networks and Systems, p. 139, ACM, 2014.

[9]  S. Skalistis and A. Simalatsar, “Near-optimal deployment of dataflow applications on many-core platforms with real-time guarantees,” in2017 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 752–757, IEEE, 2017.

[10]  S. Skalistis, Efficient Adaptive Hard Real-time Multi-processor Systems.  PhD thesis, 2017.2

Skills

  • PhD or Master in Computer Science, Electrical or Computer Engineering
  • Programming experience, e.g., C/C++ language, HDL languages is a plus
  • Computer architecture, hardware design, embedded software development, embedded systems.
  • Mostly importantly, we seek highly motivated and active researchers.

Benefits package

  • Subsidized meals
  • Partial reimbursement of public transport costs

Remuneration

monthly gross salary amounting to 2653 euros