Hardware/FPGA Engineer
Contract type : Fixed-term contract
Level of qualifications required : Graduate degree or equivalent
Other valued qualifications : MsC/MEng
Fonction : Temporary scientific engineer
Level of experience : Recently graduated
Context
Group:
The engineer will be working in the Inria-AIO team (https://team.inria.fr/aio/)
Collaboration:
The engineerwill be encouraged to collaborate with the RIOT-FP (https://www.inria.fr/en/riot-fp) and with IoT Lab (https://www.iot-lab.info/).
Location:
The position will be performed at Inria in Paris, France.
Funding:
Funding for the full three-year position has been approved and is guaranteed.
Assignment
Proposed Project:
The full project that the engineer will be a part of is the software defined mote, a low-power reconfigurable wireless embedded system that uses an FPGA rather than a microprocessor to enhance its computational capabilities. Potential topics as part of this project include (but are not limited to):
-- wireless communication protocols for low/guaranteed latency in wireless control
-- sub-ns time synchronization of a network for distributed beamforming
-- computer vision co-processors for localization and mapping
-- embedded deep neural networks for model based predictive robotic control
-- low-power and low-gate count security acceleration
Responsibilities:
At the end of the three-year contract, the engineer will be expected to make technical contributions and both write and contribute to scientific publications
Main activities
Main activities:
-- Custom logic and synthesis
-- Design of accelerators and co-processors
-- Integration of multiple co-existing subsystems
-- Benchmarking algorithms and hardware implementations, compare to literature
Additional activities:
-- Submit papers for peer review and present them at conferences
-- The engineer will also be expected to collaborate with other research groups at Inria in order to do application-specific hardware acceleration
-- Ideally, the engineer will help teach FPGA and digital synthesis courses to other engineers
Skills
Skills:
Technical skills:
-- Fundaments of VLSI and Computer Architecture
-- Familiarity with hardware description (preferably Verilog) and
-- Hands-on experience with prototyping on FPGAs
-- Strong Electrical and Computer Engineering and electronic lab fundamentals
-- Some experience with wireless communication and radio frequency electronics is helpful, but not necessary
-- Some familiarity with higher level synthesis could be useful
"Soft" skills:
-- ability to perform literature surveys and to document and present the results from these surveys
-- eager to perform independent work and research
-- good technical presentation and writing skills
Languages:
Most communication in the group is done in English. Knowing French is helpful, but not required.
Benefits package
- Subsidized meals
- Partial reimbursement of public transport costs
- Leave: 7 weeks of annual leave + 10 extra days off due to RTT (statutory reduction in working hours) + possibility of exceptional leave (sick children, moving home, etc.)
- Possibility of teleworking (after 6 months of employment) and flexible organization of working hours
- Professional equipment available (videoconferencing, loan of computer equipment, etc.)
- Social, cultural and sports events and activities
- Access to vocational training
- Social security coverage
General Information
- Theme/Domain :
Networks and Telecommunications
Instrumentation et expérimentation (BAP C) - Town/city : Paris
- Inria Center : Centre Inria de Paris
- Starting date : 2024-09-02
- Duration of contract : 3 years
- Deadline to apply : 2024-07-06
Warning : you must enter your e-mail address in order to save your application to Inria. Applications must be submitted online on the Inria website. Processing of applications sent from other channels is not guaranteed.
Instruction to apply
Defence Security :
This position is likely to be situated in a restricted area (ZRR), as defined in Decree No. 2011-1425 relating to the protection of national scientific and technical potential (PPST).Authorisation to enter an area is granted by the director of the unit, following a favourable Ministerial decision, as defined in the decree of 3 July 2012 relating to the PPST. An unfavourable Ministerial decision in respect of a position situated in a ZRR would result in the cancellation of the appointment.
Recruitment Policy :
As part of its diversity policy, all Inria positions are accessible to people with disabilities.
Contacts
- Inria Team : AIO
-
Recruiter :
Maksimovic Filip / filip.maksimovic@inria.fr
The keys to success
Essentials for success:
This list is borrowed from D. Patterson's "How to Have a Bad Career" [1]
-- To a large extent, the engineer will decide on their research topic. Do so intelligently. Read literature, observe trends, know the things that you do well and enjoy.
-- Do "library work" - read papers and learn.
-- Attend conferences and talk to people in the field.
-- Disseminate your discoveries in journals and conferences. Peer review is scary, but it dramatically improved quality of research.
-- Become an expert in the field. Teach your supervisor.
-- Transfer knowledge in a way that technically proficient but not necessarily knowledgeable people can understand
[1] https://people.eecs.berkeley.edu/~pattrsn/talks/BadCareer.pdf
About Inria
Inria is the French national research institute dedicated to digital science and technology. It employs 2,600 people. Its 200 agile project teams, generally run jointly with academic partners, include more than 3,500 scientists and engineers working to meet the challenges of digital technology, often at the interface with other disciplines. The Institute also employs numerous talents in over forty different professions. 900 research support staff contribute to the preparation and development of scientific and entrepreneurial projects that have a worldwide impact.