PhD Position F/M Design and Implementation of a Scalable Naming Service in Shared Memory
Type de contrat : CDD
Niveau de diplôme exigé : Bac + 5 ou équivalent
Fonction : Doctorant
A propos du centre ou de la direction fonctionnelle
The Inria Saclay-Île-de-France Research Centre was established in 2008. It has developed as part of the Saclay site in partnership with Paris-Saclay University and with the Institut Polytechnique de Paris .
The centre has 40 project teams , 32 of which operate jointly with Paris-Saclay University and the Institut Polytechnique de Paris; Its activities occupy over 600 people, scientists and research and innovation support staff, including 44 different nationalities.
Mission confiée
Context
The CXL [1] standard will profoundly impact resource management in data centers. CXL defines a cache coherency domain that not only includes system memory and CPUs, but also PCIe devices. It opens the way to fully disaggregated data centers, as the PCIe buses of a cluster of machines can be connected through a CXL fabric [2, 3] which allows the loads and stores emitted by a processor to be transparently routed to the memory of the receiver through a cluster-scale cache-coherency protocol. At the software level, far memory located in another machine can be accessed as transparently as local memory: a simple statement such as a = 42 can be routed seamlessly to any memory of any machine connected to the CXL fabric.
In this context, the traditional design in which independent storage nodes are accessed by compute nodes over a network becomes inadequate. This approach has been dominant in the past due to its ability to independently scale computation and storage. However, it incurs significant costs from data exchange and transformation which can be avoided by taking advantage of the efficient cluster-scale cache-coherency protocol provided by CXL.
PhD Topic
In this project, we aim to reimagine the architecture of cloud applications in the CXL era. Our approach decouples memory from processes, enabling global memory sharing across processes, similar to how threads share memory in multi-threaded applications. However, unlike the multi-threaded model, memory objects in this design can persist beyond the lifespan of individual processes, acting as long-term storage for ephemeral processes that are launched on demand to serve clients or handle large-scale data analytics. Since any process can directly access the global memory, the architecture avoids the high cost of transforming data when it is exchanged between the processes.
Central to this architecture is a naming service, which, at a high level, is reminiscent of a classical file system. This naming service must make it possible for each process to retrieve objects produced by other processes. It must reside in shared memory and scale to thousands of processes. As a PhD student, you will study how such a naming service can be designed, leveraging low-level hardware features such as virtualization extensions to alleviate bottlenecks.
References
[1] Debendra Das Sharma. Compute Express Link (CXL): enabling heterogeneous data-centric computing with heterogeneous memory hierarchy. IEEE Micro, 2022.
[2] Donghyun Gouk, Sangwon Lee, Miryeong Kwon, and Myoungsoo Jung. Direct access, high-performance memory disaggregation with DirectCXL. In Proceedings of the USENIX Annual Technical Conference, USENIX ATC’22, 2022.
[3] Huaicheng Li, Daniel S. Berger, Lisa Hsu, Daniel Ernst, Pantea Zardoshti, Stanko Novakovic, Monish Shah, Samir Rajadnya, Scott Lee, Ishwar Agarwal, Mark D. Hill, Marcus Fontoura, and Ricardo Bianchini. Pond: CXL-based memory pooling systems for cloud platforms. In Proceedings of the conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS’23, 2023.
Principales activités
Main activities:
- Design and implement a system
- Evaluate the performance of the proposed system
- Write reports and papers
Additional activities:
- Present the work as well as related work
- Attend seminars, workshops, and/or conferences
Compétences
The candidate must have a good background in system programming, concurrent programming, distributed systems, and C.
Avantages
- Subsidized meals
- Partial reimbursement of public transport costs
- Leave: 7 weeks of annual leave + 10 extra days off due to RTT (statutory reduction in working hours) + possibility of exceptional leave (sick children, moving home, etc.)
- Possibility of teleworking and flexible organization of working hours
- Professional equipment available (videoconferencing, loan of computer equipment, etc.)
- Social, cultural and sports events and activities
- Access to vocational training
Rémunération
- 1st and 2nd year : 2100€ gross/month
- 3rd year : 2190€ gross/month
Informations générales
- Thème/Domaine :
Systèmes distribués et intergiciels
Système & réseaux (BAP E) - Ville : Palaiseau
- Centre Inria : Centre Inria de Saclay
- Date de prise de fonction souhaitée : 2024-12-01
- Durée de contrat : 3 ans
- Date limite pour postuler : 2024-11-30
Attention: Les candidatures doivent être déposées en ligne sur le site Inria. Le traitement des candidatures adressées par d'autres canaux n'est pas garanti.
Consignes pour postuler
Inria is committed to the employment of people with disabilities. All of the Institute's positions are open to disabled workers. Inria implements personalized follow-up during recruitment, when the person starts to work and throughout their career.
In addition, every year Inria opens up positions to people who are recognized as disabled workers. These recruitments are offered in a variety of professional fields ranging from research to management and the operation of the institute.
Sécurité défense :
Ce poste est susceptible d’être affecté dans une zone à régime restrictif (ZRR), telle que définie dans le décret n°2011-1425 relatif à la protection du potentiel scientifique et technique de la nation (PPST). L’autorisation d’accès à une zone est délivrée par le chef d’établissement, après avis ministériel favorable, tel que défini dans l’arrêté du 03 juillet 2012, relatif à la PPST. Un avis ministériel défavorable pour un poste affecté dans une ZRR aurait pour conséquence l’annulation du recrutement.
Politique de recrutement :
Dans le cadre de sa politique diversité, tous les postes Inria sont accessibles aux personnes en situation de handicap.
Contacts
- Équipe Inria : BENAGIL
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Directeur de thèse :
Lozi Jean-pierre / jean-pierre.lozi@inria.fr
A propos d'Inria
Inria est l’institut national de recherche dédié aux sciences et technologies du numérique. Il emploie 2600 personnes. Ses 215 équipes-projets agiles, en général communes avec des partenaires académiques, impliquent plus de 3900 scientifiques pour relever les défis du numérique, souvent à l’interface d’autres disciplines. L’institut fait appel à de nombreux talents dans plus d’une quarantaine de métiers différents. 900 personnels d’appui à la recherche et à l’innovation contribuent à faire émerger et grandir des projets scientifiques ou entrepreneuriaux qui impactent le monde. Inria travaille avec de nombreuses entreprises et a accompagné la création de plus de 200 start-up. L'institut s'efforce ainsi de répondre aux enjeux de la transformation numérique de la science, de la société et de l'économie.